Introduction

Silicon on insulator (SOI) is a semiconductor wafer technology that produces higher performing, lower power (dynamic) devices than traditional bulk silicon techniques. SOI works by placing a thin, insulating layer, such as silicon oxide between a thin layer of silicon and the silicon substrate. This process helps reduce junction capacitance, resulting in higher speed and lower power consumption. SOI chips can be as much as 15 percent faster and use 20 percent less power than today's bulk complementary metal-oxide semiconductor (CMOS)-based chips.

In the area of Radio Frequency (RF) and mixed signal applications, SOI offers the opportunity to enjoy the benefit of low noise and high-quality passives. Incorporation of silicide layers such as WSi₂ allows the SOI to be modified forming Ground Plane Silicon On Insulator (GPSOI) further enhancing cross-talk reduction.

Placing a silicide layer between the buried oxide and the top silicon device layer converts SOI into Silicon on Silicide On Insulator (SSOI). This technique is aimed mostly at the bipolar transistor with the inclusion of the silicide layer minimising collector series resistance.

Other advantages over bulk silicon include:

• Higher Packing Densities

• Complete Dielectric Isolation

• Radiation Hardness

How it's made

Silicon on insulator can be made using many techniques.

• Wafer Bonding followed by Precision Grinding and Polishing.

• SIMOX: Separation by implantation of oxygen.

• Ion Split SOI : Implanation of hydrogen forming a weakened region within the silicon.

• BESOI: Bond and Etchback SOI, employing a SiGe etchstop layer.