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Queen's Advanced MicroEngineering Centre

School of Electronics, Electrical Engineering and Computer Science

Ground Plane Silicon on Insulator (GPSOI)

WSi2 - GPSOI Substrates and Their Influence on 
Cross-talk Suppression and Inductance

(by Dr. Paul Baine)

 

The Performance of RF analogue circuits in Integrated Mixed signal Telecoms IC’s can be compromised by cross-talk through the silicon substrate from adjacent digital circuits. This becomes more severe as the frequency is increased especially in SOI. A solution to this problem is to integrate a WSi2 ground plane into the SOI structure in order  to reduce the cross-talk.

gpsoi.jpg
Introduction of Ground plane makes integration of Inductors with high Q factor difficult. Integration of solid and patterned ground planes on one substrate alleviates the problem. Provided a patterned ground plane under the inductor structures reduces cross-talk at no expense to the inductor Quality factor.
gpsoi2-480.jpg

Click here to download PDF presentation

 

 

References

  1. P.Baine et al, Semiconductor wafer bonding VII, Science, Technology and Applications. Proceedings Electrochemical Society, Paris 2003.

  2. S. Stefanou et al, IEEE Transactions on Electron Devices, vol. 51, no. 3 March 2004.

  3. John Hamel et al, IEEE Microwave Guided Waves Letters, vol. 10, pp. 134-135, April 2000.
Silicon On Insulator (SOI)
Silicon On Insulator (SOI)